Freelance Digital ASIC Design and Verification Engineer (ZZP)

At Philips Medical Systems the ASIC team is working on the design of various mixed-signal Application-Specific ICs (ASICs) for biomedical applications. These CMOS ASICs usually perform sensor interfacing functions with a significant digital content. In a project for a novel and exciting application, the candidate will be responsible for the design and verification of digital systems and sub-systems as member of a team besides digital architects, back-end and FPGA engineers.

Responsibilities:

• Develop and maintain digital designs for ASIC implementation.

• Create a test plan and agree with stakeholders.

• Verify from block level to top level the digital parts of the ASIC.

• Develop and maintain test scripts to automate the verification process.

• Perform verification across process corners and with post layout designs.

• Assist mixed-signal verification engineers.

• Work with and where necessary improve existing designs.

• Reporting progress and issues to the team lead/project leader and customer.

• Where necessary perform FPGA prototyping.

• Assist with silicon validation activities.

Location: High Tech Campus, Eindhoven

Initial Contract Duration: 1 year, full-time

Starting date: asap

Requirements:

• Has University Degree (Master or Bachelor) in Electrical Engineering.

• At least five years of experience in digital design and verification.

• Fluent in verbal and written English.

• Solid understanding of the digital ASIC design flows, from system architecture to RTL and Post-layout.

• Thorough understanding of the VHDL/Verilog/SystemVerilog/UVM and Cadence tools.

• Ability to create and execute test plans, debug, and analyze potential issues discovered during verification.

• Experience of co-simulation of digital and analogue IPs to verify the whole mixed signal system.

• Experience with integration of IP blocks such as memories, dual-port memories, OTP.

• Experience with interfacing at Gb/s speeds is a plus.

• Experience of scan chain insertion and verification.